A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories

A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories

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Non-volatile memories (NVMs) offer superior density and energy characteristics compared to the conventional memories; however, NVMs suffer from severe reliability issues that can Bird Cages easily eclipse their energy efficiency advantages.In this paper, we survey architectural techniques for improving the soft-error reliability of NVMs, specifically PCM (phase change memory) and STT-RAM (spin transfer torque RAM).We focus on soft-errors, such as resistance drift and write disturbance, in PCM and read disturbance and write failures in STT-RAM.By classifying the research works based on key parameters, we highlight their similarities and distinctions.We hope that this survey will underline the crucial importance of addressing NVM reliability for ensuring their system integration Accessory (Set of 5) and will be useful for researchers, computer architects and processor designers.